Implementation of a Binary Floating Point Fused Multiply-Add Unit

für 44.10€ kaufen ··· 9783846546215 ··· 1036188443 ···
The fused multiply add (FMA) operation is very important in many scientific and engineering applications. It is a key feature of the floating-point unit (FPU), which greatly increases the floating-point performance and accuracy.Many approaches are developed on floating-point fused multiply add unit to decrease its latency.two of these approaches are implemented in the Verilog hardware description language. ModelSim10.0c is a used to compile Verilog codes and to simulate them.
Hersteller: LAP Lambert Academic Publishing
Marke: LAP Lambert Academic Publishing
EAN: 9783846546215
Kat: Hardcover/Naturwissenschaften, Medizin, Informatik, Technik/Technik/Elektronik, Elektrotechnik, Nachrichtentechnik
Lieferzeit: Sofort lieferbar
Versandkosten: Ab 20¤ Versandkostenfrei in Deutschland
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5: Ab 20¤ Versandkostenfrei in Deutschland
6: LAP Lambert Academic Publishing
7: Implementation of a Binary Floating Point Fused Multiply-Add Unit
:::: Hardcover/Naturwissenschaften, Medizin, Informatik, Technik/Technik/Elektronik, Elektrotechnik, Nachrichtentechnik

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···· aufgenommen: 30.07.2020 · 11:05:02
···· & überprüft: 13.11.2020 · 02:09:03

: Implementation : Binary : Floating : Multiply :

Implementation of a Binary Floating Point Fused Multiply-Add Unit

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